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2007 | 17 | 4 | 565-575
Tytuł artykułu

Reduction in the number of PAL macrocells in the circuit of a Moore FSM

Treść / Zawartość
Warianty tytułu
Języki publikacji
EN
Abstrakty
EN
Optimization methods of logic circuits for Moore finite-state machines are proposed. These methods are based on the existence of pseudoequivalent states of a Moore finite-state machine, a wide fan-in of PAL macrocells and free resources of embedded memory blocks. The methods are oriented to hypothetical VLSI microcircuits based on the CPLD technology and containing PAL macrocells and embedded memory blocks. The conditions of effective application of each proposed method are shown. An algorithm to choose the best model of a finite-state machine for given conditions is proposed. Examples of proposed methods application are given. The effectiveness of the proposed methods is also investigated.
Rocznik
Tom
17
Numer
4
Strony
565-575
Opis fizyczny
Daty
wydano
2007
otrzymano
2007-03-06
poprawiono
2007-08-30
(nieznana)
2007-10-27
Twórcy
  • Institute of Computer Engineering and Electronics, University of Zielona Góra, ul. Podgórna 50, 65-246 Zielona Góra, Poland
  • Institute of Computer Engineering and Electronics, University of Zielona Góra, ul. Podgórna 50, 65-246 Zielona Góra, Poland
  • Institute of Computer Engineering and Electronics, University of Zielona Góra, ul. Podgórna 50, 65-246 Zielona Góra, Poland
Bibliografia
  • Adamski M. and Barkalov A. (2006): Architectural and Sequential Synthesis of Digital Devices. Zielona Góra: University of Zielona Góra Press.
  • www.altera.com
  • Baranov S. (1994): Logic Synthesis for Control Automata. Boston: Kluwer.
  • Barkalov A. (1998): Principles of Optimization of Logical Circuit of Moore FSM. Cybernetics and system analysis, No.1, pp.65-72 (in Russian).
  • Barkalov A. and Barkalov A. (2005): Design of Mealy Finite-State-Machines with Transformation of Object Codes. International Journal of Applied Mathematics and Computer Science, Vol.15, No.1, pp.151-158.
  • Barkalov A. and Wegrzyn M. (2006): Design of Control Units with Programmable Logic. Zielona Góra:University of Zielona Góra Press.
  • Chattopadhyay S. (2005): Area Conscious State Assignment with Flip-Flop and Output Polary Selection for Finite State Machine Synthesis - A Genetic Algorithm Approach, The Computer Journal, Vol.48, No.4, pp.443-450.
  • De Micheli G. (1994): Synthesis and Optimization of Digital Circuits. New York: McGraw Hill.
  • Devadas S., Ma H.-K., Newton R., Sangiovanni-Vincentelli A. (1988): State Assignment of Finite State Machines Targeting Multilevel Logic Implementations, IEEE Transactions on Computer-Aided Design, pp.1290-1300.
  • Kam T., Villa T., Brayton R., Sangiovanni-Vincentelli A. (1998): Synthesis of Finite State Machines: Functional Optimization, Boston/London/Dordrecht: Kluwer Academic Publishers.
  • Kania D. (2004): Logic Synthesis Oriented on Programmable Logic Devices of the PAL type. Gliwice: Silesian University of Technology (in Polish).
  • www.latticesemi.com
  • Maxfield C. (2004): The Design Warrior's Guide to FPGA. NJ: Elsevier.
  • Mc Cluskey E. (1986): Logic Design Principles. Englewood Cliffs: Prentice Hall.
  • Micheli, G. D., Brayton, R. K. and Vincentelli, A. S. (1985): Optimal state assignment for finite state machines. IEEE Transactions on Computer-Aided Design, pp.269-284.
  • Villa T., Kam T., Brayton R., Sangiovanni-Vincentelli A. (1998): Synthesis of Finite State Machines: Logic Optimization, Kluwer Academic Publishers, Boston/London/Dordrecht.
  • Villa T., Sangiovanni-Vincentelli A. (1998): State Assignmentof Finite State Machines for Optimal Two-Level Logic Implementation, IEEE Transactions on Computer-Aided Design, pp.905-924.
  • Xia, Y. and Almaini, A. (2002): Genetic algorithm based state assignment for power and area optimization, IEEP Comput. Dig. T., Vol.149, No.4, pp.128-133.
  • www.xilinx.com
  • Yang S. (1991): Logic Synthesis and Optimization Benchmarks User Guide, Microelectronics Center of North Carolina, Research Triangle Park, North Carolina
Typ dokumentu
Bibliografia
Identyfikatory
Identyfikator YADDA
bwmeta1.element.bwnjournal-article-amcv17i4p565bwm
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