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Area-oriented technology mapping for LUT-based logic blocks

100%
Kubica M., Kania D.
International Journal of Applied Mathematics and Computer Science
|
2017
|
tom 27
|
nr 1
207-222
EN
One of the main aspects of logic synthesis dedicated to FPGA is the problem of technology mapping, which is directly associated with the logic decomposition technique. This paper focuses on using configurable properties of CLBs in the process of logic decomposition and technology mapping. A novel theory and a set of efficient techniques for logic decomposition based on a BDD are proposed. The paper shows that logic optimization can be efficiently carried out by using multiple decomposition. The essence of the proposed synthesis method is multiple cutting of a BDD. A new diagram form called an SMTBDD is proposed. Moreover, techniques that allow finding the best technology mapping oriented to configurability of CLBs are presented. In the experimental section, the presented method (MultiDec) is compared with academic and commercial tools. The experimental results show that the proposed technology mapping strategy leads to good results in terms of the number of CLBs.
2
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Parallel implementation of local thresholding in Mitrion-C

88%
Kryjak T., Gorgoń M.
International Journal of Applied Mathematics and Computer Science
|
2010
|
tom 20
|
nr 3
571-580
EN
Mitrion-C based implementations of three image processing algorithms: a look-up table operation, simple local thresholding and Sauvola's local thresholding are described. Implementation results, performance of the design and FPGA logic utilization are discussed.
3
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Decomposition of the fuzzy inference system for implementation in the FPGA structure

88%
Wyrwoł B., Hrynkiewicz E.
International Journal of Applied Mathematics and Computer Science
|
2013
|
tom 23
|
nr 2
473-483
EN
The paper presents the design and implementation of a digital rule-relational fuzzy logic controller. Classical and decomposed logical structures of fuzzy systems are discussed. The second allows a decrease in the hardware cost of the fuzzy system and in the computing time of the final result (fuzzy or crisp), especially when referring to relational systems. The physical architecture consists of IP modules implemented in an FPGA structure. The modules can be inserted into or removed from the project to get a desirable fuzzy logic controller configuration. The fuzzy inference system implemented in FPGA can operate with a much higher performance than software implementations on standard microcontrollers.
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