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2010 | 20 | 3 | 571-580
Tytuł artykułu

Parallel implementation of local thresholding in Mitrion-C

Treść / Zawartość
Warianty tytułu
Języki publikacji
EN
Abstrakty
EN
Mitrion-C based implementations of three image processing algorithms: a look-up table operation, simple local thresholding and Sauvola's local thresholding are described. Implementation results, performance of the design and FPGA logic utilization are discussed.
Rocznik
Tom
20
Numer
3
Strony
571-580
Opis fizyczny
Daty
wydano
2010
otrzymano
2009-06-20
poprawiono
2009-11-18
poprawiono
2010-03-01
Twórcy
  • Laboratory of Biocybernetics, Department of Automatics, AGH University of Science and Technology, Al. Mickiewicza 30, 30-059 Cracow, Poland
  • Laboratory of Biocybernetics, Department of Automatics, AGH University of Science and Technology, Al. Mickiewicza 30, 30-059 Cracow, Poland
Bibliografia
  • Asano, S., Maruyama, T. and Yamaguchi, Y. (2009). Performance comparison of FPGA, GPU and CPU in image processing, International Conference on Field Programmable Logic and Applications, FPL 2009, Prague, Czech Republic, pp. 126-131.
  • Canto, E., Fons, M., Lopez, M. and Ramos, R. (2009). Acceleration of complex algorithms on a fast reconfigurable embedded system on Spartan-3, International Conference on Field Programmable Logic and Applications, FPL 2009, Prague, Czech Republic, pp. 429-434.
  • Cho, J., Jin, S., Pham, X., Kim, D. and Jeon, J. (2007). FPGAbased real-time visual tracking system using adaptive color histograms, Proceedings of the IEEE International Conference on Robotics and Biomimetics, ROBIO 2007, Sanya, China, pp. 172-177.
  • Claus, C., Huitl, R., Rausch, J. and Stechele, W. (2009). Optimizing the SUSAN corner detection algorithm for a high speed FPGA implementation, International Conference on Field Programmable Logic and Applications, FPL 2009, Prague, Czech Republic, pp. 138-145.
  • Denolf, K., Neuendorffer, S. and Vissers, K. (2009). Using Cto-gates to program streaming image processing kernels efficiently on FPGAs, International Conference on Field Programmable Logic and Applications, FPL 2009, Prague, Czech Republic, pp. 626-630.
  • Edwards, S. (2006). The challenges of synthesizing hardware from C-like languages, IEEE Design & Test of Computers 23(5): 375-386.
  • El-Araby, E., Nosum, P. and El-Ghazawi, T. (2007). Productivity of high-level languages on reconfigurable computers: An HPC perspective, International Conference on FieldProgrammable Technology, ICFPT 2007, Kitakyushu, Japan, pp. 257-260.
  • Gocławski, J., Sekulska-Nalewajko, J., Gajewska, E. and Wielanek, M. (2009). An automatic segmentation method for scanned images of wheat root systems with dark discolourations, International Journal of Applied Mathematics and Computer Science 19(4): 679-689, DOI: 10.2478/v10006-009-0055-x.
  • Gorgon, M. and Tadeusiewicz, R. (2000). Hardware-based image processing library for Virtex FPGA, in J. Schewel, P.M. Athanas, C.H. Dick and J.T. McHenrz (Eds.) Reconfigurable Technology: FPGAs for Computing and Appplications II, Proceedings of SPIE, Vol. 4212, pp. 1-10.
  • Ibarra-Manzano, M., Devy, M., Boizard, J.-L., Lacroix, P. and Fourniols, J.-Y. (2009). An efficient reconfigurable architecture to implement dense stereo vision algorithm using high-level synthesis, International Conference on Field Programmable Logic and Applications, FPL 2009, Prague, Czech Republic, pp. 444-447.
  • ImpulseC (2009). Impulse accelerated technologies website, www.impulseaccelerated.com.
  • Jabłoński, M., Przybyło, J. and Gorgon, M. (2006). Real-time implementation of motion detection algorithm based on Pixelstreams, Proceedings of the IFAC Workshop on Programmable Devices and Embedded Systems, PDeS 2006, Napa, CA, USA, pp. 186-190.
  • Jin, S., Cho, J., Kwon, K. and Jeon, J. (2009). A dedicated hardware architecture for real-time auto-focusing using an FPGA, Machine Vision and Applications 21(5): 727-734.
  • Kalaycioglu, C., Ulusel, O. and Hamzaoglu, I. (2009). Low power techniques for motion estimation hardware, International Conference on Field Programmable Logic and Applications, FPL 2009, Prague, Czech Republic, pp. 180-185.
  • Kokufuta, K. and Maruyama, T. (2009). Real-time processing of local contrast enhancement on FPGA, International Conference on Field Programmable Logic and Applications, FPL 2009, Prague, Czech Republic, pp. 288-293.
  • Lai, H.-C., Savvides, M. and Chen, T. (2007). Proposed FPGA hardware architecture for high frame rate (100 fps) face detection using feature cascade classifiers, Proceedings of the First IEEE International Conference on Biometrics: Theory, Applications and Systems, BTAS 2007, Crystal City, VA, USA, pp. 1-6.
  • Mitrion-C (2009). Mitrion website, www.mitrionics.com.
  • MitrionUserGuide (2008). Mitrion user guide-Image processing using Sobel convolution, Mitrionics AB, Lund.
  • Murthy, S., Alvis, W., Shirodkar, R., Valavanis, K. and Moreno, W. (2008). Methodology for implementation of unmanned vehicle control on FPGA using system generator, Proceedings of the 7th International Caribbean Conference on Devices, Circuits and Systems, ICCDCS 2008, Cancun, Mexico, pp. 1-6.
  • Otsu, N. (1979). A threshold selection method from gray level histograms, IEEE Transactions on Systems, Man and Cybernetics 9(1): 62-66.
  • Piromsopa, K., Aporntewan, C. and Chogsatitvataa, P. (2001). An FPGA implementation of a fixed-point square root operation, International Symposium on Communications and Information Technology, ISCIT 2001, Bangkok, Thailand, pp. 587-689.
  • Plavec, F., Vranesic, Z. and Brown, S. (2009). Enhancements to FPGA design methodology using streaming, International Conference on Field Programmable Logic and Applications, FPL 2009, Prague, Czech Republic, pp. 294-301.
  • Rafajłowicz, E., Wnuk, M. and Rafajłowicz, W. (2008). Local detection of defects from image sequences, International Journal of Applied Mathematics and Computer Science 18(4): 581-592, DOI: 10.2478/v10006-008-0051-6.
  • Russ, J.C. (2002). Image Processing Handbook, 4th Edn., CRC Press, Inc., Boca Raton, FL.
  • Sauvola, J. and Pietikainen, M. (2000). Adaptive document image binarization, Pattern Recognition 33(2): 225-236.
  • Sezgin, M. and Sankur, B. (2004). Survey over image thresholding techniques and quantitative performance evaluation, Journal of Electronic Imaging 13(1): 146-165.
  • Shafait, F., Keysers, D. and Breuel, T.M. (2008). Efficient implementation of local adaptive thresholding techniques using integral images, Proceedings of the 15th Document Recognition and Retrieval Conference (DRR-2008), Part of the IS&T/SPIE International Symposium on Electronic Imaging, San Jose, CA, USA, pp. 681510-681510-6.
  • Sotiropoulos, I. and Papaefstathiou, I. (2009). A fast parallel matrix multiplication reconfigurable unit utilized in face recognitions systems, International Conference on Field Programmable Logic and Applications, FPL 2009, Prague, Czech Republic, pp. 276-281.
  • Vitabile, S., Gentile, A., Siniscalchi, S. and Sorbello, F. (2004). Efficient rapid prototyping of image and video processing algorithms, Euromicro Symposium on Digital System Design, DSD 2004, Rennes, France, pp. 452-458.
  • Wiatr, K. (2003). Acceleration of Computations in Vision Systems, WNT, Warsaw, (in Polish).
  • Wildermann, S., Walla, G., Ziermann, T. and Teich, J. (2009). Self-organizing multi-cue fusion for FPGA-based embedded imaging, International Conference on Field Programmable Logic and Applications, FPL 2009, Prague, Czech Republic, pp. 132-137.
Typ dokumentu
Bibliografia
Identyfikatory
Identyfikator YADDA
bwmeta1.element.bwnjournal-article-amcv20i3p571bwm
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