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2010 | 20 | 1 | 191-205
Tytuł artykułu

Analysis of multibackground memory testing techniques

Autorzy
Treść / Zawartość
Warianty tytułu
Języki publikacji
EN
Abstrakty
EN
March tests are widely used in the process of RAM testing. This family of tests is very efficient in the case of simple faults such as stuck-at or transition faults. In the case of a complex fault model-such as pattern sensitive faults-their efficiency is not sufficient. Therefore we have to use other techniques to increase fault coverage for complex faults. Multibackground memory testing is one of such techniques. In this case a selected March test is run many times. Each time it is run with new initial conditions. One of the conditions which we can change is the initial memory background. In this paper we compare the efficiency of multibackground tests based on four different algorithms of background generation.
Rocznik
Tom
20
Numer
1
Strony
191-205
Opis fizyczny
Daty
wydano
2010
otrzymano
2009-04-16
poprawiono
2009-09-04
Twórcy
  • Institute of Computer Science, Białystok Technical University, Wiejska 45A, 15-351 Białystok, Poland
Bibliografia
  • Cheng, K.-L., Tsai, M.-F. and Wu, C.-W. (2002). Neighborhood pattern sensitive fault testing and diagnostics for random access memories, IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems 21(11): 1328-1336.
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  • Franklin, M. and Saluja, K. K. (1996). Testing reconfigured RAM's and scrambled address RAM's for pattern sensitive faults, IEEE Transactions on CAD of Integrated Circuits and Systems 15(9): 1081-1087.
  • Goor, A. J. v. d. (1991). Testing Semiconductor Memories: Theory and Practice, John Wiley & Sons, Chichester.
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  • Huang, Y. and Li, J. F. (2006). Testing active neighborhood pattern-sensitive faults of ternary content addressable memories, European Test Symposium, Southampton, UK, pp. 55-62.
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  • Karpovsky, M. G. and Yarmolik, V. N. (1994). Transparent memory testing for pattern-sensitive faults, Proceedings of the IEEE International Test Conference on TEST: The Next 25 Years, Washington, DC, USA, pp. 860-869.
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  • Mrozek, I. and Yarmolik, V. N. (2008b). Optimal backgrounds selection for multi run memory testing, DDECS'08: Proceedings of the IEEE International Workshop on Design and Diagnostics of Electronic Circuits and Systems, Bratislava, Slovakia, pp. 332-338.
  • Mrozek, I. and Yarmolik, V. N. (2008a). MATS+ transparent memory test for pattern sensitive fault detection, MIXDES'08: Proceedings of the 15th International Conference on Mixed Design of Integrated Circuits and Systems, Poznań, Poland, pp. 493-498.
  • Mrozek, I., Yarmolik, V. N. and Buslowska, E. (2008). Multiple run memory testing for PSF detection, EWDTS '08: Proceedings of the IEEE East-West Design and Test Symposium, Lviv, Ukraine, pp. 125-130.
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  • Yarmolik, S. (2008). Address sequences and backgrounds with different Hamming distances for multiple run March tests, International Journal of Applied Mathematics and Computer Science 18(3): 329-339, DOI: 10.2478/v10006-0080030-y.
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  • Zhang, B. and Srihari, S. (2003). Binary vector dissimilarity measures for handwriting identification, Proceedings of the SPIE, Document Recognition and Retrieval X, Santa Clara, CA, USA, pp. 155-166.
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Typ dokumentu
Bibliografia
Identyfikatory
Identyfikator YADDA
bwmeta1.element.bwnjournal-article-amcv20i1p191bwm
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