Remarks on hardware implementation of image processing algorithms

• Autorzy: Marek Wnuk
• Języki publikacji: EN

Abstrakty

EN

Image processing in industrial vision systems requires both real-time speed and robustness. Modern computers, which fulfill the first demand, are sensitive to hard industrial environment conditions and require considerable amounts of energy. Programmable logic chips are available, which can realize many simple, still time-consuming operations in a parallel or a pipelined manner. The paper discusses particular features of the pipelined architecture and presents selected techniques of implementing early image processing procedures in hardware.

Słowa kluczowe

EN

on-line image processing; real-time; hardware; pipeline; programmable logic

• Wydawca: University of Zielona Gora Press
• Czasopismo: International Journal of Applied Mathematics and Computer Science
• Rocznik: 2008
• Tom: 18
• Numer: 1
• Strony: 105-110

Daty

wydano

2008

Twórcy

autor

Marek Wnuk

• Institute of Computer Engineering, Automation and Robotics, Wrocław University of Technology, ul. Janiszewskiego 11/17, 50-372 Wrocław, Poland

Bibliografia

• Drzazga A., Hajdul J., Malec J. and Wnuk M. (1983). Hardware image preprocessor, Technical Report, Wrocław University of Technology (in Polish).
• Dudani S., Breeding K. and McGhee R. (1977). Aircraft identification by moment invariants, IEEE Transactions on Computers, 26(1): 39-46.
• SGS-THOMSON Microelectronics (1994). IMSA110 Image and Signal Processing Sub-system, http://www.datasheetcatalog.com.
• Texas Instruments Europe (1997). Implementation of an Image Processing Library for the TMS320C8x, BPRA059, http://www.datasheetcatalog.com.
• Xilinx, Inc. (2007). Spartan-3A DSP FPGA Family: Complete Data Sheet, DS610, http://www.datasheetcatalog.com.

Identyfikatory

DOI

10.2478/v10006-008-0010-2